Implementation of a Binary Floating Point Fused Multiply-Add Unit 1

Vetenskap & teknik

Implementation of a Binary Floating Point Fused Multiply-Add Unit

Abdel Aziz Ibrahim Walaa • Aly Fahmy Hossam • Hussien Khalil Ahmed

Pocket

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104 sidor
2012

The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.

Författare: Abdel Aziz Ibrahim Walaa, Aly Fahmy Hossam, Hussien Khalil Ahmed
Format: Pocket/Paperback
ISBN: 9783846546215
Språk: Engelska
Antal sidor: 104
Utgivningsdatum: 2012-12-16
Förlag: LAP Lambert Academic Publishing