Offset Reduction Techniques in High-Speed Analog-to-Digital Converters 1

Data & IT

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters

Pedro M Figueiredo • Joo C Vital

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382 sidor
2010

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Författare: Pedro M Figueiredo, Joo C Vital
Format: Pocket/Paperback
ISBN: 9789048181926
Språk: Engelska
Antal sidor: 382
Utgivningsdatum: 2010-10-28
Förlag: Springer